TY  - BOOK
AU  - Navabi, Zainalabedin
TI  - Verilog Digital System Design: Rt Level Synthesis, Testbench And Verification
SN  - 9780070252219
U1  - 621.392 
PY  - 2006///
CY  - New Delhi
PB  - Tata Mc Graw_Hill
KW  - Electronics & Communication
KW  - Verilog Digital System
ER  -