St. Joseph’s College of Engineering and Technology, Palai

Choondacherry P.O, Palai, Kottayam 686 579, Kerala, India.

Library and Information Division

Image from Google Jackets

Image from OpenLibrary

Normal view MARC view ISBD view

Vlsi Digital Signal Processing Systems Design And Implementation

By:

Parhi, Keshab K

Material type: Text

Text

TextLanguage: ENG Publication details: New Delhi Wiley 2013Description: 784Subject(s):

Electronics & Communication

DDC classification:

621.395 PAR/V

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Holdings ( 4 )
Comments ( 0 )

Holdings
Item type	Current library	Collection	Call number	Vol info	Status	Barcode
Books	St Josephs College of Engineering and Technology Palai B-Tech (KTU)	Computer Science and Engineering	621.395 PAR/V (Browse shelf(Opens below))	No. of copies: 1	Available	40504
Books	St Josephs College of Engineering and Technology Palai B-Tech	Electronics and Communication Engineering	621.395 PAR/V (Browse shelf(Opens below))	No. of copies: 1	Available	76628
Books	St Josephs College of Engineering and Technology Palai B-Tech	Electronics and Communication Engineering	621.395 PAR/V (Browse shelf(Opens below))	No. of copies: 1	Available	76917
Books	St Josephs College of Engineering and Technology Palai B-Tech	Electronics and Communication Engineering	621.395 PAR/V (Browse shelf(Opens below))	No. of copies: 1	Available	77334

Browsing St Josephs College of Engineering and Technology Palai shelves, Shelving location: B-Tech, Collection: Electronics and Communication Engineering Close shelf browser (Hides shelf browser)

Previous	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	Next
Previous	621.395 LEE/D Digital Circuits And Logic Design	621.395 MAN/O Op Amps For Everyone	621.395 PAR/V Vlsi Digital Signal Processing Systems Design And Implementation	621.395 PAR/V Vlsi Digital Signal Processing Systems Design And Implementation	621.395 PAR/V Vlsi Digital Signal Processing Systems Design And Implementation	621.395 PED/C Circuit Design With Vhdl	621.395 UYE/I Introduction To Vlsi Circuit And Systems	Next

There are no comments on this title.

to post a comment.

OPAC powered by Koha – the world’s first free and open-source library management system.
Maintained by Kochi Digital, handling cloud server installation and technical maintenance.
For support, contact our library staff:

Mr. Justine Thomas

Mr. Justine Thomas

Librarian (Gr. I)

Email: librarian@sjcetpalai.ac.in

Phone: +91 94476 94464

Mr. Centil Jose

Mr. Centil Jose

Librarian (Gr. II)

Phone: +91 94964 64673

Mr. Geo Mathew

Mr. Geo Mathew

Librarian (Gr. III)

Phone: +91 94477 63627

Mr. Sibin Sebastian

Mr. Sibin Sebastian

Librarian (Gr. III)

Email: sibin.sebastian@sjcetpalai.ac.in

Phone: +91 88934 36127

Library Contact:
Email: librarian@sjcetpalai.ac.in, justine@sjcetpalai.ac.in
Address: Librarian, Library & Information Division,
St. Joseph’s College of Engineering & Technology, Palai, Choondacherry PO, Plassanal (Via), Kottayam PIN – 686 579, Kerala.
Phone: 04822 – 239 825 (Ext. 825)
Mobile: +91 94476 94464

Total OPAC Visitors

free web counter