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St. Joseph’s College of Engineering and Technology, Palai

Choondacherry P.O, Palai, Kottayam 686 579, Kerala, India.

Library and Information Division

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Verilog Digital System Design Rt Level Synthesis, Testbench And Verification

By: Material type: TextTextLanguage: ENG Publication details: New Delhi Tata Mc Graw_Hill 2006Description: 384ISBN:
  • 9780070252219
Subject(s): DDC classification:
  • 621.392 NAV/V
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Item type Current library Call number Vol info Status Barcode
Books Books St Josephs College of Engineering and Technology Palai B-Tech (KTU) 621.392 NAV/V (Browse shelf(Opens below)) No. of copies: 1 Available 14569

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Mr. Justine Thomas

Mr. Justine Thomas

Librarian (Gr. I)

Email: librarian@sjcetpalai.ac.in

Phone: +91 94476 94464

Mr. Centil Jose

Mr. Centil Jose

Librarian (Gr. II)

Phone: +91 94964 64673

Mr. Geo Mathew

Mr. Geo Mathew

Librarian (Gr. III)

Phone: +91 94477 63627

Mr. Sibin Sebastian

Mr. Sibin Sebastian

Librarian (Gr. III)

Email: sibin.sebastian@sjcetpalai.ac.in

Phone: +91 88934 36127

Library Contact:
Email: librarian@sjcetpalai.ac.in, justine@sjcetpalai.ac.in
Address: Librarian, Library & Information Division,
St. Joseph’s College of Engineering & Technology, Palai, Choondacherry PO, Plassanal (Via), Kottayam PIN – 686 579, Kerala.
Phone: 04822 – 239 825 (Ext. 825)
Mobile: +91 94476 94464

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